期刊論文

論文名稱 期刊名稱 全部作者 年度
Athena: Capacity Enhancement of Reversible Data Hiding with Consideration of the Adaptive Embedding Level Journal of Visual Languages and Computing Ya-Chi Hsu, Bo-Chao Cheng, Huan Chen and Yuan-Sun Chu 2014
A wide-range low-cost all-digital duty-cycle corrector IEEE Transactions on Very Large Scale Integration (VLSI) Systems Ching-Che Chung*, Duo Sheng, and Chang-Jun Li(學生), “,” , vol. 23, no. 11, pp. , Nov. 2015 2014
A low-cost low-power all-digital spread-spectrum clock generator, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Ching-Che Chung*, Duo Sheng, and Wei-Da Ho 2014
Design of a Low-Voltage Low-Dropout Regulator IEEE Transactions on Very Large Scale Integration (VLSI) Systems Chung-Hsun Huang, Ying-Ting Ma, and Wei-Chen Liao 2014
A low-voltage high PSR LDO regulator with a simple ripple cancellation technique IEICE Electronics Express Chung-Hsun Huang, Wei-Chen Liao, and Chih-Ming Liao 2014
A compact programmable LDO regulator for ultra-low voltage SoC IEICE Electronics Express Chung-Hsun Huang, and Wei-Chen Liao 2014
Power-Aware Code Scheduling Assisted with Power Gating and DVS Future Generation Computer System Cheng-Yu Lee, Tzong-Yen Lin, Rong-Guey Chang 2014
Instruction scheduling and transformation for a VLIW unified reduced instruction set computer/digital signal processor processor with shared register architecture Concurrency and Computation: Practice and Experience Cheng-Yu Lee, Min-Chin Hung, Rong-Guey Chang 2014
Exploring feasibilities of symmetry islands and monotonic current paths in slicing trees for analog placement IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD) P.-H. Wu, M. P.-H. Lin*, T.-C. Chen, C.-F. Yeh, T.-Y. Ho, and B.-D. Liu 2014
Sub-threshold SRAM bit cell pnn for VDDmin and power reduction Electronics Letters Y. C. Chien; I. H. Chiang; J. S. Wang 2014