2014 |
FTFC |
Adaptive variable-latency cache management for low-voltage caches |
Y. H. Yu, P. H. Wang, T. F. Chen, T. J. Lin, and J. S. Wang |
2014 |
ICISA |
Accelerometer-based breathing signal acquisition with empirical mode decomposition |
B. Y. Yang, C. C. Chang, Y. H. Ting, J. W. Liao, H. L. Lin, T. J. Lin, C. Yeh, and J. S. Wang |
2013 |
2013 IEEE International Solid-State Circuits Conference (ISSCC) |
A 3.4mW Photovoltaic Energy-Harvesting Charger with Integrated Maximum Power Point Tracking and Battery Management |
Tsung-Heng Tsai, and K. Chen |
2013 |
2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers |
Self-super-cutoff power gating with state retention on a 0.3V 0.29fJ/cycle/gate 32b RISC core in 0.13µm CMOS |
Jian-Shiun Chen; Chingwei Yeh; Jinn-Shyan Wang |
2013 |
ISSCC |
A 0.48V 0.57nJ/pixel video recording SoC in 65nm CMOS |
Tay-Jyi Lin, Cheng-An Chien, Pei-Yao Chang, Ching-Wen Chen, Po-Hao Wang, Ting-Yu Shyu, Chien-Yung Chou, Shien-Chun Luo, Jiun-In Guo, Tien-Fu Chen, Gene C.H. Chuang, Yuan-Hua Chu, Liang-Chia Cheng, Hong-Men Su, Chewnpu Jou, Meikei Ieong, Cheng-Wen Wu, and Jinn-Shyan Wang |
2013 |
VLSI-SoC |
Variation-aware and adaptive-latency accesses for reliable low voltage caches |
P. H. Wang, W. C. Cheng, Y. H. Yu, T. C. Kao, C. L. Tsai, P. Y. Chang, T. J. Lin, J. S. Wang, and T. F. Chen |
2013 |
VLSI-SoC |
Variation-aware and adaptive-latency accesses for reliable low voltage caches |
P. H. Wang, W. C. Cheng, Y. H. Yu, T. C. Kao, C. L. Tsai, P. Y. Chang, T. J. Lin, J. S. Wang, and T. F. Chen |
2013 |
VLSI-SoC |
Variation-aware and adaptive-latency accesses for reliable low voltage caches |
P. H. Wang, W. C. Cheng, Y. H. Yu, T. C. Kao, C. L. Tsai, P. Y. Chang, T. J. Lin, J. S. Wang, and T. F. Chen |
2013 |
VLSIC |
A 0.36V, 33.3μW 18-band ANSI S1.11 1/3-octave filter bank for digital hearing aids in 40nm CMOS |
J. S. Wang, K. J. Chang, T. J. Lin, R. Wu, and C. Yeh |
2013 |
VLSIC |
A 0.36V, 33.3μW 18-band ANSI S1.11 1/3-octave filter bank for digital hearing aids in 40nm CMOS |
J. S. Wang, K. J. Chang, T. J. Lin, R. Wu, and C. Yeh |