2015 |
VMC |
Characterization of delay variations in modern FPGAs |
C. H. Kao, Z. H. Yang, C. L. Huang, Y. S. Chang, C. W. Wu, T. Y. Shyu, P. Y. Chou, T. J. Lin, and J. S. Wang |
2015 |
VMC |
Characterization of delay variations in modern FPGAs |
C. H. Kao, Z. H. Yang, C. L. Huang, Y. S. Chang, C. W. Wu, T. Y. Shyu, P. Y. Chou, T. J. Lin, and J. S. Wang |
2015 |
ASICON |
Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches |
P. Y. Chou, I. C. Wu, J. W. Lin, X. Y. Lin, T. F. Chen, T. J. Lin, and J. S. Wang |
2015 |
ASICON |
Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches |
P. Y. Chou, I. C. Wu, J. W. Lin, X. Y. Lin, T. F. Chen, T. J. Lin, and J. S. Wang |
2015 |
ASICON |
Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches |
P. Y. Chou, I. C. Wu, J. W. Lin, X. Y. Lin, T. F. Chen, T. J. Lin, and J. S. Wang |
2014 |
Design Automation Conference (DAC-2014) |
Parasitic-aware sizing and detailed routing for binary-weighted capacitors in charge-scaling DAC |
M. P.-H. Lin*, V. W.-H. Hsiao, and C.-Y. Lin |
2014 |
ICSICT |
Operation-condition and timing-error collaborative monitoring for fixed-latency AVS designs |
P. Y. Chou, C. L. Liou, J. S. Wang, and T. J. Lin |
2014 |
ICSICT |
Operation-condition and timing-error collaborative monitoring for fixed-latency AVS designs |
P. Y. Chou, C. L. Liou, J. S. Wang, and T. J. Lin |
2014 |
Hot Chips |
Low-power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET) |
C. H. Huang, W. J. Chen, K. J. Chang, Y. H. Ting, K. C. Hsu, Y. F. Pan, C. C. Chen, Y. H. Chu, T. J. Lin, and J. S. Wang |
2014 |
ICCE-TW |
Maintaining color fidelity for dual-shot HDR imaging |
C. Yeh, C. Y. Tsai, T. J. Lin, and J. I. Guo |