Journal Paper

Paper Title Journal Title Authors Year
High-resolution and all-digital on-chip delay measurement with low supply sensitivity for SoC applications IEICE Electronics Express (ELEX) Duo Sheng*, Ching-Che Chung, Hsiu-Fan Lai and Shu-Syun Jhao 2013
A counter-based all-digital spread-spectrum clock generator with high EMI reduction in 65nm CMOS IEICE Electronics Express (ELEX) Ching-Che Chung*, Duo Sheng, and Wei-Da Ho 2013
A 4R/2W Register File Design for UDVS Microprocessors in 65-nm CMOS IEEE Transactions on Circuits and Systems II: Express Briefs Pei-Yao Chang; Tay-Jyi Lin; Jinn-Shyan Wang; Yen-Hsiang Yu 2012
AN ULTRA LOW-VOLTAGE/POWER-EFFICIENT ALL-DIGITAL DELAY LOCKED LOOP IN 55 nm CMOS TECHNOLOGY Journal of Circuits, Systems and Computers CHUN-YUAN CHENG, JINN-SHYAN WANG, and CHENG-TAI YEH 2012
Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY Guo-An Jian, Cheng-An Chien, Peng-Sheng Chen, and Jiun-In Guo 2012
Support of Probabilistic Pointer Analysis in the SSA Form IEEE Transactions on Parallel and Distributed Systems Ming-Yu Hung; Peng-Sheng Chen; Yuan-Shin Hwang; Roy Dz-Ching Ju; Jenq-Kuen Lee 2012
Design of 65 nm Sub-Threshold SRAM Using the Bitline Leakage Prediction Scheme and the Non-trimmed Sense Amplifier IEICE TRANSACTIONS on Electronics Jinn-Shyan WANG Pei-Yao CHANG Chi-Chang LIN 2012
Tay-Jyi Lin 2012
Towards Process Variation-Aware Power Gating IEEE Transactions on Very Large Scale Integration (VLSI) Systems Ching-wei Yeh, Yuan-Chang Chen, Jinn-Shyan Wang 2012
Towards Process Variation-Aware Power Gating IEEE Transactions on Very Large Scale Integration (VLSI) Systems Ching-wei Yeh, Yuan-Chang Chen, Jinn-Shyan Wang 2012