Year 2012
Authors Jinn-Shyan Wang
Paper Title AN ULTRA LOW-VOLTAGE/POWER-EFFICIENT ALL-DIGITAL DELAY LOCKED LOOP IN 55 nm CMOS TECHNOLOGY
Journal Title Journal of Circuits, Systems and Computers
Vol.No 21
Issue.No 8
From 1240025
To 1240025-14
Date of Publication 2013-01-07
Language English