Year 2015
Authors Jinn-Shyan Wang; Chun-Yuan Cheng; Pei-Yuan Chou; Tzu-Yi Yang
Paper Title A Wide-Range, Low-Power, All-Digital Delay-Locked Loop With Cyclic Half-Delay-Line Architecture
Journal Title IEEE Journal of Solid-State Circuits
Vol.No 50
Issue.No 11
From 2635
To 2644
Language English